1. Technical Field of the Invention
This invention relates generally to data communication and more particularly to data transmissions.
2. Description of Related Art
Communication systems are known to transport large amounts of data between a plurality of end user devices, which, for example, include telephones, facsimile machines, computers, television sets, cellular telephones, personal digital assistants, etc. As is also known, such communication systems may be local area networks (LANs) and/or wide area networks (WANs) that are stand-alone communication systems or interconnected to other LANs and/or WANs as part of a public switched telephone network (PSTN), packet switched data network (PSDN), integrated service digital network (ISDN), the Internet, etc. As is further known, communication systems include a plurality of system equipment to facilitate the transporting of data. Such system equipment includes, but is not limited to, routers, switches, bridges, gateways, protocol converters, frame relays, private branch exchanges, etc.
The transportation of data within communication systems is typically governed by one or more standards that ensure the integrity of data conveyances and fairness of access for data conveyances. For example, there are a variety of Ethernet standards that govern serial transmissions within a communication system at data rates of 10 megabits per second, 100 megabits per second, 1 gigabit per second and beyond. Another standard, which is for fiber optic data conveyances, is Synchronous Optical NETwork (SONET) that provides various high data rate protocols, including one for 10 gigabits per second. In accordance with such standards, many system components and end user devices of a communication system transport data via serial transmission paths. Internally, however, the system components and end user devices process data in a parallel manner. As such, each system component and end user device converts parallel data into serial data and transmits the serial data to another device with negligible, or recoverable, loss of information.
To facilitate the transmission of serial data, each of the system components and user devices includes an output signaling convention. For instance, many devices use a low voltage complimentary metal oxide semiconductor (LVCMOS) input/output (I/O) standard that inputs and outputs signals that swing from rail to rail (e.g., from 0 volts to a supply voltage). Such an I/O implementation was used because it was simple to implement and it reliable transferred data. However, it did so at relatively slow data rates (e.g., less than approximately 300 MHz).
More recently, system components and/or user devices are using an I/O standard called Low Volt Differential Swing (LVDS), which can transfer data up to 10 GHz. In general, an LVDS serial interface achieves the high data rates because LVDS outputs swing only a couple hundreds milli-Volts (mV) and cross each other as shown in FIG. 1. As is further shown in FIG. 1, an LVDS signal includes two primary parameters: Vod and Vos. Vod is the different between 2 LVDS outputs: Aout and Bout; and Vos is the average level of the two outputs.
As with most signaling conventions, there are variations of the basic concept. For instance, the following table includes several different implementations of the low voltage differential swing signaling convention.
DCVod (mV)Vos (V)MinMaxMinMaxDCLVDS2474541.1251.375RSDS1004001.1001.500MINI3006001.0001.400LDT4957150.4950.715
FIG. 2 illustrates a prior art embodiment of a LVDS based transmitter of an I/O module that may perform in accordance with one of the above LVDS signaling conventions. In this embodiment, the transmitter includes a pre-driver and an LVDS driver. As shown, the pre-driver receives an input signal (IN) and provides four switching signals (SW_A, SW_B, SW_C, and SW_C) to the LVDS driver. The LVDS driver produces the LVDS output (Aout, Bout) based on the four switching signals.
FIG. 3 is a schematic block diagram of the LVDS driver of FIG. 2 driving an LVDS input of another device. In this illustration, the LVDS driver is on one chip (i.e., integrated circuit) and the LVDS input is on another chip. The chips and a pair of 50 Ohm resistors are on a printed circuit board.
In this embodiment, Vos is determined by the equilibrium of pull up and pull down of the current sources and switches of the LVDS driver. For example, a stronger pull up than pull down raises Vos and a weaker pull up than pull down lowers Vos. In addition, Vod is determined by the current supplied by the pull up current source (I_PU) or the current supplied by the pull down current source (I_PD) divided by 2 and then multiply by 100 Ohm. Accordingly, to maintain an accurate LVDS signaling, the pull up circuitry needs to substantially match the pull down circuitry, which, in a CMOS process, is extremely difficult. Further, this embodiment only conforms to one of the versions of LVDS signaling conventions.
One prior art embodiment to provide a circuit that accommodates multiple LVDS signaling conventions is shown in FIG. 4. In this prior art embodiment, a global control module provides control signals (PUonb_0, PUonb_1, PUonb_n, PDonb_0, PDonb_1, PDonb_n) to each of the LVDS drivers based on the selected signal convention. Typically, the control signals are stored in memory. As shown, each of the LVDS drivers includes switches and 50 Ohm resistors as shown in FIG. 3 and further includes a plurality of P-channel transistors and N-channel transistors. The P-channel and N-channel transistors are enabled/disabled based on the control signals to implement the desired LVDS signaling convention.
In this embodiment, the pull up current and pull down current are determined by the number of P-channel transistors and N-channel transistors that are enabled. The transistors may be enabled in the active region and/or linear region of operation to establish the currents. While this is a relatively simple implementation to achieve a single circuit that accommodates multiple signaling conventions, it requires memory space and, if implemented in a CMOS process, the pull up current and pull down currents may differ to the point of failing the specified values of Vos and Vod. Further, Vos and Vod may be adversely affected by variations and/or noise on VCC and ground.
FIG. 5 illustrates another prior art embodiment of an LVDS driver that accommodates multiple signaling conventions. In this embodiment, the LVDS driver includes a plurality of parallel switches to control the pull up and pull down currents. Accordingly, each of the signaling conventions is achieved by enabling a predetermined number of switches (A and B) or (C and D) to generate the appropriate currents, which, in turn, establishes Vos & Vod. Note that, the global control module stores the switching states for the switches for each of the signaling conventions.
While this is also a relatively simple implementation to achieve a single circuit that accommodates multiple signaling conventions, it requires more memory space than the embodiment of FIG. 4. In addition, if implemented in a CMOS process, the pull up current and pull down currents may differ to the point of failing the specified values of Vos and Vod. Further, Vos and Vod may be adversely affected by variations and/or noise on VCC and ground.
FIG. 6 is another embodiment of a single LVDS driver that can accommodate multiple signaling conventions that combines the features of both FIGS. 4 and 5. While this embodiment allows finer tuning of the signal conventions than the embodiments of FIGS. 4 and 5, it still suffers from the adverse affects of a CMOS implementation and variations and/or noise on VCC and ground. Further, because it includes a combination of FIGS. 4 and 5, it requires more memory.
FIGS. 7, 8 and 9 are schematic diagrams of various embodiments of a 100 Ohm circuit that can be disconnected. In FIG. 7, the 100 Ohms is achieved via transistors since they are more cost effective than using poly resistors. However, the resistance values of the transistors vary considerably more than poly-resistors and makes it difficult to consistently achieve 100 Ohms.
The embodiments of FIGS. 8 and 9 include a combination of poly-resistors and transistors. This reduces the variation caused by the transistor only implementation by the ratio of resistor impedance to transistor impedance. For instance, the ratio of the embodiment of FIG. 8 is 1:4 and the ratio of the embodiment of FIG. 9 is 1:9.
Further, U.S. Pat. No. 6,788,116 teaches further embodiments of LVDS drivers.
While the above has described numerous improvements in LVDS drivers, there exists a need for improvement in Vos and Vod accuracy.